Dear Experts,
Please find the below requirement.
We are using the PCSD motor module for pumps and Motor Control.
There were some Interlocks have been written for the motor module with ILK_RESET_REQD parameter set to False. So this means, if the cause of interlock is cleared then the motor module should clear the interlock bit and it should be ready for start.
But customer has a requirement that if cause of the interlock clears, then there is some logic it waits for that logic, then motor module’s Interlock bit to be cleared and to be ready to start.
Could you please give some guidance for this?
Is this can be done at Class level to add some additional logic, so that the instance can be updated for requirement?
Thanks,
Manik
Can anybody help me here?
In reply to manik:
My undertsanding is you want to have your interlock go inactive, but not allow the motor to start without an additional permissive becoming active. Does this permissive become enforced only upon activation of this one interlock or will it apply to starting the motor always?
The PCSD library for motors gives you eight permissibe conditions (C_DC_PMXX). Permissives do not allow the motor to transition from a passive state to an active state if they are violated.
If you want the permissive to only apply after occurence of the one interlock, you will probably need some additional logic in the permissive to detect exclusive transitions to interlocked.
I'm looking at the PCSD v11a FDS document for Motor Modules as I write this.
Just AND that specific "some logic" output flag in the interlock condition in instances.... OR
You can also add another function blocks in the class (may be the same "some logic") between Interlock block & DC block, including a off-delay timer or NDE block with ACT blocks for INTERLOCK_D removal...... OR
Add permissive logic seperately for the condition.
Bye the way, please respond on your cylinder position query.... How did you implement it?
Regards,
Amod.