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Enabling smooth transitioning of slave controllers to cascade when part of split range or ratio control scheme and master cannot be initialised

Hi everyone,

I'm looking for some help in managing transitions of slave controllers to cascade / bumpless transfer.

In cases where a slave controller receives remote CAS IN from a master controller or calc block and the master OP cannot be back-initialised, what options are available in DeltaV to manage the 'bump' due to difference between the CAS In (output of master block) and the current slave SP?

(for whatever reason - an example might be a split range controller with 2 outputs, but one slave has been in auto or manual)

Is there a standard PID function block feature and parameter to 'limit' the rate at which the slave SP is aligned with the CAS IN (when placed in CAS)?

Any general guidance / pointers on managing this aspect of bumpless transfer in DeltaV would be appreciated.

Thanks in advance!

2 Replies

  • When properly configured, the standard "BKCAL" handshaking provided bumpless transfer. On simple a master-slave cascade arrangement, be sure to check PID/CONTROL_OPTS "SP-PV Trackin in MAN". For the case of Split Range controller, you should be using the SPLITTER block between Master PID and the two Slave PID's. You are correct in this case if one of slave PID's is not in a cascade and is not at the split range dictated SP, it will transition to the splitter SP. You can use the balance time "BAL_TIME" (seconds) to change how fast the Slave PID's SP moves from where it is to the new SP. You should be able to get action you want so keep asking questions until you are satisfied! Hope this helps.
  • In reply to James Beall:

    Many thanks James - BAL_TIME is the parameter I think I need - I had looked in BOL but had not found it. In doing some limited testing I thought I had observed some ramped transitions (in the order of 5-10 seconds) when reinstating a slave to cascade with a non-aligned master OP.

    BOL states "The time over which an internal balancing bias will be dissipated. Only has practical meaning when the STRUCTURE parameter is a P + D selection." which doesn't quite seem to cover the functionality you describe?

    If BAL_TIME is made larger e.g. 5 min to slowly equalise the slave, I presume this would have no further (lagging) effect after 5 min?

    Is there a default for BAL_TIME?