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DC Block States/Reset

Hi all,

Can anyone explain to me how the dc block handles fails.

I currently have a valve control using a dc block. The valve is in a group with other valves and a failure on itself or the other valves is an interlock on itself.

The problem i seem to be facing is this.

The fail alarm from interlock or any confirm time fail puts the dc block to the passive state. I have reset required selected in device ops but until the interlocks are clear i can not change the state from shutdown/interlocked to locked to allow the reset to work even though the dc block is now in the passive state.

The problem with this is that when i have a confirm time fail i also get the interlock from the failed valve. If i choose to ignore pv ie turn on accept_d i still cannot clear the fail alarm while the interlock is still active even though the valve is in the passive state.

Is there something i am missing in the DC block setup?

Thanks in advance

6 Replies

  • It sounds like you have external logic driving the INTERLOCK_D, you might need to condition the interlock logic so it only interlocks when other valves fail, not itself.
  • In reply to AdrianOffield:

    thanks Adrian,
    I looked at that but it did not seem to be the cause. I did find in the process that external logic was removing the Accept_D which allowed the undefined field value to be copied around. Part of the reset is to use Track_in to change the SP to the passive output. I will be looking further to see what else this effects.
    I still find it strange that the interlocks have to be clear before the DC block will go to the Locked State even though the dc block has been put to the passive state. Reset_D only seems to work when the dc block is in the locked state.
  • You mention "The valve is in a group with other valves and a failure on itself or the other valves is an interlock on itself". Do you mean that on any failure on the valve an interlock is activated on the valve??. If so, maybe this is causing some trouble...
    DC block behavior regarding INTERLOCK depends on DC state before getting interlocked. A FAILURE is raised if any INTERLOCK/SHUTDOWN becomes active when DC was in any active state and regardles RESET REQUIRED option, DC is locked until all interlocks are clear (DC INTERLOC_D value becomes 1 again), after that DC goes to LOCKED state if RESET REQUIRED option is set RESET must be activated to enable DC accepting Active SP again.

    If you have a interlock condition associated with DC failure this may happen:
    SP set to Active 1/2 -> Confirm time expired without DC reaching requeste Active State -> DC "Act. conf. time" Failure raised -> Interlock Activated because DC failed -> DC "Shutdown/interlocked" Failure raised.
    At this point, although SP_D is Passive, DC State is Shutdown/Interlocked instead of "Locked" so it cannot be reset and, DC is on Failure because the interlock and interlock is active because DC failure (circular condition).

    If you have a INTERLOCK condition looking at DC/FAIL_ACTIVE != 0 this is the problem.

    Regards
  • Unfortunately the DC block behaves this way and there isn't a way to remove the Failure alarm when an Interlock forces the block to the passive state until the Interlocks have all cleared.

    A new Enhanced DC block being released in v13 will behave differently and won't cause a Failure when an Interlock occurs. Failures that will cause the FAIL_ACTIVE to be set for this new EDC block are only the confirming of the PV (Crack Time, Travel Time, Confirm Lost Time) and the states of Interlocked, Tripped, Shutdown, and Locked have been moved to an OPERATION_STATE instead of being all included into DC_STATE like the DC block.

    For your configuration today, you will have to either live with the alarm staying active until the interlocks clear or write some custom logic (i.e. Clear Failure) to intercept the Interlock signals and 'allow' them to clear for a scan of the module (ensuring that the DC block doesn't go to an Active State!) so the failure can clear.

    Regards
  • In reply to gamella:

    Thanks gamella,Thanks for the detailed explanation.
    Yes i do have a circular reference with with the DC Blocks own failure. But as it is a group interlock(ie looking for a failure of any valve in the group) to seperate itself out would require a different failure interlock for every valve.( ie not 1 group interlock). I am using track_in and accept and have managed the clear the failure whilst interlocks are present. This is not using the reset_d parameter of the DC block.
  • In reply to Matt Stoner:

    Thanks Matt i did consider this but thougt there had to be a better way.