Dear all,

I have been facing issues in understanding the how First Out logic works.

and How it is able to find out of 3 interlock, which one came first?

Also last is how the Visibility is given for arrows that come as per first out logic?

Visibility Expression is as follows:

For 1st Interlock Arrow : DVSYS.@mod@/INTERLOCK/FIRST_OUT.F_CV[1][_NOT_CONFIG_OK_] =1

For 2nd Interlock Arrow : DVSYS.@mod@/INTERLOCK/FIRST_OUT.F_CV[2][_NOT_CONFIG_OK_] =1

For 3rd Interlock Arrow : DVSYS.@mod@/INTERLOCK/FIRST_OUT.F_CV[3][_NOT_CONFIG_OK_] =1

And so on.....

now what is the pupose of number written in [ ] (Sq. Brackets).

as i checked in module that FIRST_OUT parameter shows integer value  2,4,8,16,32,......2n .

Kindly requested to provide any information on the above.


2 Replies

  • Number in brackets is looking at that bit number of the first out integer number which also corresponds with the interlock condition number.

    Bit 1 = 1
    Bit 2 = 2
    Bit 3 = 4

    If FIRST_OUT is 5, bits 1 and 3 are true, meaning the conditions 1 and 3 were the cause of the interlock.
  • The number in the bracket specifies the bit number of the integer in binary form. With values of 1, 2, 4 ,8... only one bit is set at a time so if bit 4 is set the value is 8 in the integer and vice versa.

    By looking at the individual bits the logic is consistent. The result is either 1 or 0. If we read the integer, each expression would require an evaluation (equal to 1, 2, 4 , 8, or whatever.)

    The interlock block traps the first bit that is set. If two or more bits are set at the same time the first in will use the lowest ordered bit. Typically the first trip comes in alone. Additional conditions are usually a consequence of the first and are the result of the module executing on the first in. It is recommended to place more important initiators in the lower order bits such that if a coincidental simultaneous trip occurred the operator would always see the more important cause as the first in.

    Andre Dicaire