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PID Structure and Bias

Hi All,

I am currently working on a vessel temperature control EM in which the master PID block structure is P action on error, D on PV.

The PV from the PID block has has been wired back into its BIAS.

Can anyone tell what the objective of this control strategy is?

Many thanks,

Michael

3 Replies

  • The PID Structure that has been chosen has no integral term. Thus, a manual "Bias" term can be used to make the PID/OUT either start at some value or track some value (like a downstream loop SP). The PID/OUT= error*Gain + D action+ Bias + FFWD. The BIAS value for this Structure and the "Act on IR" (initialization request) Control Option of the PID determine what happens to the OUT and the BIAS when the loop is put in Auto (or CAS or RCAS). Without seeing the entire control scheme I can only guess that this is an attempt make the PID/OUT have some initial value prior to going to an AUTO mode or track some value. Hope this helps but let me know if you can provide more details or have more questions.
  • In reply to James Beall:

    Thanks for the reply James.

    Ctrl sys engineer responsible for design no longer around but I spoke to someone from ops and it seems the objective was to prevent overshoot.

    Selecting ‘Master Temp Ctrl’ cmd sets the Master PID mode to Cas and Slave to Rout.

    Master PID structure is P action on error, D on PV and Slave is PI on error, D on PV.

    What I don’t understand is that with the selected Master PID structure they have set the rate to 0 and have not selected ‘Act on IR’ in control options.

    The control options that have been selected are:

    • Obey SP Lim in Cas or RCas
    • SP-PV Track in LO or IMan
    • SP-PV Track in Man

    The following have also been set on the master loop:

    • FF_ENABLE             True
    • FF_GAIN                   1
    • FF_VAL                     -10 (Possibly due to vessel temp range 0-100degC and temp ctrl unit ranged 5-50degC)

    PID Master Structure.docx

  • In reply to MHorgan:

    Note that when the slave loop is in ROUT, it is not controlling. The input to its SP (via CAS or RCAS) is passed through as a percent of PV_SCALE to the percent of OUT_SCALE. This matches what I see in the DOC you sent, either the Master controller is controller or the slave controller is controlling, but not both in cascade manner. I also see that the standard features for cascading controllers (even though the slave is in ROUT, not actively controlling) is not being used as indicated by no connection to the BKCAL_IN of the Master PID. Thus, it would be hard for me to totally understand exactly how the control scheme is working.
    There are features and techniques in DeltaV, other than not using Integral, to avoid overshoot which might also avoid some of the complexity of the current solution. I would like to suggest that you reach out to your Emerson Local Business Partner or Emerson direct sales person and have them contact me for more direct support of your questions.