Emerson Exchange 365

Istvan,

The DeltaV PID is designed so that when you make a transition between MAN to AUTO, CAS or RCAS modes with a difference (or a different difference) between SP and PV, it does not give the proportional "kick" regardless of the PID Structure that is chosen. However, if you make a SP change after the PID is in AUTO, CAS or RCAS, it will give the proportional kick if the PID structure chosen applies “P” to error.

Also, note that the DeltaV PID is implemented as a "positional" algorithm. Thus, the internally calculated “PID/OUT” can be below or above the OUT_LIMITS. It appears that the internally calculated PID OUT was around -12% when you made the 10% SP change. This added 20% (delta error * Gain) to the internal PID OUT which resulted in the external OUT going to about +8%.

The internal PID OUT (without FFWD) is really P+I+D+Bias. This Bias diminishes to 0 with time constant equal to the RESET time when the PID is in AUTO, CAS or RCAS modes. If you set PV=SP and OUT=0 and then put the loop to MAN, the Bias should be 0. Then repeat your test and you should see the OUT go from 0 to 20%. Let me know the results.

Hope this helps!
James

In reply to Michael Krispin:

Michael,
Good questions! In Istvan's case, it turns out that he was not in Manual at the start of his test. A previous move of the SP to 0, while in Auto, pushed the "internal OUT" of the PID to -8% resulting in and external OUT of 12% (+20% + (-8%)) when the SP was moved to 10%. You are correct that if you put the PID in MAN or ROUT, in the PID "internal OUT" will track the actual external OUT. Let me explain it this way though It's not exactly the way it is implemented. Think of it as a temporay Bias being added to the PID internal OUT to make the internal OUT match the External OUT. When the PID is put into an automatic model (Auto, Cas or RCAS), the temporary Bias goes to zero in a first order response with a time constant equal to the Reset time. So, when changing modes from Man or ROUT to an automatic mode, there is no bump of the OUT.

Note that for the DeltaV positional algorithm, when the OUT is at a high or low limit or a downstream block is limited, and the PID is in a control mode and ignoring Derivative action, the Internal OUT = Last Integral Contribution +- Gain*Errror. For stand alone loop, or a master loop without "Dynamic Reset Limit" active, the BACKCAL_IN is essentially the external OUT. The integral action is turned off during any limited condition.

When the PID is in a control mode (AUTO/CAS/RCAS), it is normal that the internal OUT CAN (but may not) be beyond the OUT limits. This is not integral saturation, it is simply the functionality of a positional PID implementation. In the rare cases where want the OUT to come off the OUT limits more quickly, you can use the ARW feature (as you have mentioned ) or in V12 and later you can use the "Recovery Filter" PIDPlus feature which provides more adjustability of this action. I can send a presentation on the use of the PIDPlus Recover Filter option if you are interested.

The Alpha is used to determine the amount of first order filter applied to the signal being used for derivative action. The Filter value is Alpha*Rate. It is always active.

If the PID/Structure chosen is "Two Degrees of Freedom", the Beta and Gamma factors are always active. As shown in Books On Line, these parameters are 0-1 and determine how much of the P and D action respecitvely are applied to the Error. Thus, a Beta less than 1 would lessen the size of the "proportional OUT move" to a SP change.

Hope this helps!.

James